Overview: After approximately 17 years of room-temperature storage, the irradiation and annealing responses of poly-Si-gate nMOS transistors can change significantly. For devices with 32 nm gate oxides that were stored in a non-hermetic environment, the magnitude of the threshold-voltage rebound during postirradiation annealing is much larger now than in previous tests on devices from the same wafer and packaging lot in 1988. These changes in threshold-voltage shifts are primarily due to a more than 50% increase in interface-trap generation during irradiation and annealing. When these parts are baked before irradiation, the aging-related increase in threshold-voltage shift is reduced significantly. Devices from the same lot with 60 nm oxides stored hermetically sealed, showed a ~25% increase in interface-trap generation as compared to 1988 results. When hermetically sealed 60 nm devices were exposed to elevated temperature and humidity prior to irradiation, they experienced similar increases in threshold voltage rebound as those observed for the devices stored in a non-hermetic environment. These increases are likely due to the absorption of water molecules into the gate oxides. The increases in threshold-voltage rebound in non-hermetically stored devices and those exposed to elevated temperature and humidity is larger than standard testing margins, e.g., in MIL-STD 883, Test Method 1019. These results reinforce the importance of allowing for changes in radiation response with aging and temperature when performing hardness assurance testing of MOS and linear bipolar devices, especially for low-dose-rate applications in which hermeticity cannot be guaranteed.

DVth for 32 nm gate oxide nMOS transistors stored since 1987 in a non-hermetic environment vs. postirradiation anneal time for exposures to a dose of 500 krad(SiO2).	DVth for 60 nm gate oxide nMOS transistors stored since 1987 hermetically sealed, then exposed to 130 �C / 85% RH for various times vs. postirradiation anneal time for exposures to a dose of 100 krad(SiO2).

Publications:

1. M. P. Rodgers et. al 'The effects of aging on MOS irradiation and annealing response' IEEE Trans. on Nucl Sci., vol. 52 Dec 2005
2. A. P. Karmarkar, et. al, Aging and baking effects on radiation hardness of MOS capacitors, IEEE Trans. Nucl. Sci., vol. 48 Dec 2001
3. D. M. Fleetwood, Effects of hydrogen transport and reactions on microelectronics radiation response and reliability, Microelectronics Reliability, vol. 42 2002

ACKNOWLEDGEMENTS

This study is supported by funds from the National Science Foundation through the Vanderbilt University IGERT program on Risk and Reliability Engineering and was funded, in part, by U.S. Navy as a Defense Technology Objective (DTO). The authors gratefully acknowledge this support.